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Author(s): Ho, C.S. | Liou, J.J. |
Year: 1995
Citation: INTERNATIONAL JOURNAL OF ELECTRONICS Volume: 79 Issue: 2 Pages: 151-162
Abstract: A digital VLSI circuit design for an adaptive resonance theory (ART) neural network architecture, called the augmented ART-1 neural network (AART1-NN) is presented. An axon-synapse-tree structure is used to realize the activities of the short-term memories and reset subsystem. The long-term memory traces are implemented using NMOS transmission gates. PSpice circuit simulation was carried out to verify the design of a prototype, seven-node AART1-NN. A clock-controlled delay element is included in the simulation to illustrate the functionality of the AART1-NN. It is shown that the AART1-NN node selection activities simulated from the circuit designed are identical to those described by the coupled differential equations governing the AART1-NN.
Topics:
Neural Hardware,
Models:
ART 1,
Modified ART,
